ר8( 3rockchip,rk3399-sapphire-excavatorrockchip,rk3399 +7Excavator-RK3399 Boardaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53arm,armv8pscid   cpu@1cpuarm,cortex-a53arm,armv8pscid   cpu@2cpuarm,cortex-a53arm,armv8pscid   cpu@3cpuarm,cortex-a53arm,armv8pscid   cpu@100cpuarm,cortex-a72arm,armv8psci    cpu@101cpuarm,cortex-a72arm,armv8psci    display-subsystemrockchip,display-subsystem pmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   &xin24m fixed-clock=n6Mxin24m`amba simple-bus+mdma-controller@ff6d0000arm,pl330arm,primecellm@ t apb_pclk dma-controller@ff6e0000arm,pl330arm,primecelln@ t apb_pclkpcie@f8000000rockchip,rk3399-pcie axi-baseapb-base+ Gaclkaclk-perfhclkpm0123syslegacyclient`  ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38m8$(+coremgmtmgmt-stickypipepmpclkaclk7okay >GQdefault_interrupt-controlleri ethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac~$ +stmmaceth7okayinputrgmiiQdefault_  'P(%dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@. Mbiuciuciu-driveciu-sample<~$y+reset7okayGQb=ozQdefault _dwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@A.р  Lbiuciuciu-driveciu-sample<~$z+reset7okayGQ=рoQdefault_ !"#$%sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 N Nclk_xinclk_ahbMemmc_cardclock`& phy_arasan~7okayG(7 usb@fe380000 generic-ehci8'usbhostarbiterutmi(usb7okayusb@fe3a0000 generic-ohci:'usbhostarbiterutmi(usb7okayusb@fe3c0000 generic-ehci<)usbhostarbiterutmi*usb7okayusb@fe3e0000 generic-ohci> )usbhostarbiterutmi*usb7okayusb@fe800000rockchip,rk3399-dwc3+m0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk$% +usb3-otg7okayusb@fe800000 snps,dwc3iQotg+,usb2-phyusb3-phy Yutmi_widebz~7okayusb@fe900000rockchip,rk3399-dwc3+m0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk$& +usb3-otg7okayusb@fe900000 snps,dwc3nQhost-.usb2-phyusb3-phy Yutmi_widebz~7okaydp@fec00000rockchip,rk3399-cdn-dp r  ruocore-clkpclkspdifgrf/0~ $HJ+spdifdptxapbcore 7disabledportsport+endpoint@01 endpoint@12 interrupt-controller@fee00000 arm,gic-v3+miP   interrupt-controller@fee20000arm,gic-v3-its ppi-partitionsinterrupt-partition-0' interrupt-partition-1' saradc@ff100000rockchip,rk3399-saradc>0Pesaradcapb_pclk$ +saradc-apb7okayB3 i2c@ff110000rockchip,rk3399-i2cA AU i2cpclk;Qdefault_4+7okayN,ert5651@1arockchip,rt5651Ymclk }5 6  i2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#Qdefault_7+ 7disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"Qdefault_8+7okayNe i2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&Qdefault_9+ 7disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%Qdefault_:+ 7disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$Qdefault_;+ 7disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkcQdefault_<=7okayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkbQdefault_> 7disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkdQdefault_?7okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkeQdefault_@ 7disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDQdefault_ABCD+ 7disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5Qdefault_EFGH+ 7disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4Qdefault_IJKL+ 7disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCQdefault_MNOP+ 7disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkQdefault_QRST~+ 7disabledthermal-zonescpudUtripscpu_alert0ppassive Vcpu_alert1$passive Wcpu_crits criticalcooling-mapsmap0V map1WgpudUtripsgpu_alert0$passive Xgpu_crits criticalcooling-mapsmap0X tsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclk$ +tsadc-apb sQinitdefaultsleep_Y#Z-Y77okayMd Uqos@ffa58000syscon  bqos@ffa5c000syscon  cqos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon  fqos@ffa70080syscon  gqos@ffa74000syscon@  dqos@ffa76000syscon`  eqos@ffa90000syscon  hqos@ffa98000syscon  [qos@ffaa0000syscon  iqos@ffaa0080syscon  jqos@ffaa8000syscon  kqos@ffaa8080syscon  lqos@ffab0000syscon  \qos@ffab0080syscon  ]qos@ffab8000syscon  ^qos@ffac0000syscon  _qos@ffac0080syscon  `qos@ffac8000syscon  mqos@ffac8080syscon  nqos@ffad0000syscon  oqos@ffad8080syscon qos@ffae0000syscon  apower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+ pd_iep@34"[pd_rga@33!\]pd_vcodec@31^pd_vdu@32 _`pd_gpu@35#apd_edp@25lpd_emmc@23bpd_gmac@22fcpd_sd@27Ldpd_sdioaudio@28epd_usb3@24fgpd_vio@15+pd_hdcp@21rhpd_isp0@19ijpd_isp1@20klpd_tcpc0@RK3399_PD_TCPC0~}pd_tcpc1@RK3399_PD_TCPC1 pd_vo@16+pd_vopb@17mnpd_vopl@18osyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2+ io-domains&rockchip,rk3399-pmu-io-voltage-domain7okaypspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5qqspiclkapb_pclk<Qdefault_rstu+ 7disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7qq"baudclkapb_pclkfQdefault_v 7disabledi2c@ff3c0000rockchip,rk3399-i2c<q  q q i2cpclk9Qdefault_w+7okay=Nepmic@1brockchip,rk808 x`Mxin32krk808-clkout2Qdefault_yz{{{{{{ |,{8{E{R|_} regulatorsDCDC_REG1 lvdd_center{ qpqregulator-state-memDCDC_REG2 lvdd_cpu_l{ qpq regulator-state-memDCDC_REG3lvcc_ddr{regulator-state-memDCDC_REG4lvcc_1v8{w@w@ regulator-state-memw@LDO_REG1 lvcc1v8_dvp{w@w@regulator-state-memLDO_REG2 lvcc3v0_tp{--regulator-state-memLDO_REG3 lvcc1v8_pmu{w@w@ }regulator-state-memw@LDO_REG4 lvcc_sdio{w@2Z %regulator-state-mem-LDO_REG5lvcca3v0_codec{--regulator-state-memLDO_REG6lvcc_1v5{``regulator-state-mem`LDO_REG7lvcca1v8_codec{w@w@ regulator-state-memLDO_REG8lvcc_3v0{-- pregulator-state-mem-SWITCH_REG1 lvcc3v3_s3{ regulator-state-memSWITCH_REG2 lvcc3v3_s0{ regulator-state-memregulator@40silergy,syr827@3 lvdd_cpu_b 4`{P{ regulator-state-memregulator@41silergy,syr828A3lvdd_gpu 4`{P{ regulator-state-memi2c@ff3d0000rockchip,rk3399-i2c=q  q q i2cpclk8Qdefault_~+7okayNXeaccelerometer@68invensense,mpu6500h xi2c@ff3e0000rockchip,rk3399-i2c>q  q q i2cpclk:Qdefault_+ 7disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB[Qdefault_qpwm7okay pwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB[Qdefault_qpwm 7disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB [Qdefault_qpwm7okay pwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0[Qdefault_qpwm 7disablediommu@ff650800rockchip,iommue@svpu_mmu aclkifacef 7disablediommu@ff660480rockchip,iommu f@f@u vdec_mmu aclkifacef 7disablediommu@ff670800rockchip,iommug@*iep_mmu aclkifacef 7disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclk$jgi +coreaxiahb~!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruu`sq(J qclock-controller@ff760000rockchip,rk3399-cruv`s@BCx@#g/;рxh<4`#Fׄׄ  syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+ io-domains"rockchip,rk3399-io-voltage-domain7okayp%pusb2-phy@e450rockchip,rk3399-usb2phyP{phyclk`Mclk_usbphy0_480m7okay 'host-port linestate7okay (otg-port0ghjotg-bvalidotg-idlinestate7okay +usb2-phy@e460rockchip,rk3399-usb2phy`|phyclk`Mclk_usbphy1_480m7okay )host-port linestate7okay *otg-port0lmootg-bvalidotg-idlinestate7okay -phy@f780rockchip,rk3399-emmc-phy$emmcclk7okay &pcie-phyrockchip,rk3399-pcie-phyrefclk$+phy7okay phy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~~$L+uphyuphy-pipeuphy-tcphy7okaydp-port /usb3-port ,phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref~ $M+uphyuphy-pipeuphy-tcphy7okaydp-port 0usb3-port .watchdog@ff848000 snps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBtx mclkhclkUQdefault_~7okayNei2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'txrxi2s_clki2s_hclkVQdefault_~7okay i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(txrxi2s_clki2s_hclkWQdefault_~ 7disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)txrxi2s_clki2s_hclkX~7okay vop@ff8f0000rockchip,rk3399-vop-lit>wׄaclk_vopdclk_vophclk_vop ~$ +axiahbdclk7okayport+ endpoint@0 endpoint@1 endpoint@2 endpoint@3 endpoint@4 2iommu@ff8f3f00rockchip,iommu?w vopl_mmu aclkiface~f7okay vop@ff900000rockchip,rk3399-vop-big>vׄaclk_vopdclk_vophclk_vop ~$ +axiahbdclk7okayport+ endpoint@0 endpoint@1 endpoint@2 endpoint@3 endpoint@4 1iommu@ff903f00rockchip,iommu?v vopb_mmu aclkiface~f7okay iommu@ff914000rockchip,iommu @P+ isp0_mmu aclkifacef~ iommu@ff924000rockchip,iommu @P, isp1_mmu aclkifacef~ hdmi-soundsimple-audio-card (i2s A [hdmi-sound7okaysimple-audio-card,cpu rsimple-audio-card,codec rhdmi@ff940000rockchip,rk3399-dw-hdmi(tqopiahbisfrvpllgrfcec~7okay | portsport+endpoint@0 endpoint@1 mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrf~$+apb 7disabledports+port@0+endpoint@0 endpoint@1 mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrf~$+apb 7disabledports+port@0+endpoint@0 endpoint@1 edp@ff970000rockchip,rk3399-edp jlo dppclkgrfQdefault_~$+dp7okayports+port@0+endpoint@0 endpoint@1 port@1+endpoint@0 gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 jobmmugpu~#7okay pinctrlrockchip,rk3399-pinctrl +mgpio0@ff720000rockchip,gpio-bankrq  i 6gpio1@ff730000rockchip,gpio-banksq  i xgpio2@ff780000rockchip,gpio-bankxP  i gpio3@ff788000rockchip,gpio-bankxQ  i gpio4@ff790000rockchip,gpio-bankyR  i 5pcfg-pull-up  pcfg-pull-down  pcfg-pull-none  pcfg-pull-none-12ma   pcfg-pull-none-13ma   pcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma  pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high pcfg-output-low clockclk-32k edpedp-hpd  gmacrgmii-pins      rmii-pins      i2c0i2c0-xfer  wi2c1i2c1-xfer  4i2c2i2c2-xfer  7i2c3i2c3-xfer  8i2c4i2c4-xfer    ~i2c5i2c5-xfer    9i2c6i2c6-xfer    :i2c7i2c7-xfer  ;i2c8i2c8-xfer  i2s0i2s0-2ch-bus` i2s0-8ch-bus  i2s1i2s1-2ch-busP  sdio0sdio0-bus1 sdio0-bus4@  sdio0-cmd  sdio0-clk  sdio0-cd sdio0-pwr sdio0-bkpwr sdio0-wp sdio0-int sdmmcsdmmc-bus1 sdmmc-bus4@     #sdmmc-clk   sdmmc-cmd   !sdmmc-cd  "sdmmc-wp sleepap-pwroff ddrio-pwroff spdifspdif-bus  spdif-bus-1 spi0spi0-clk  Aspi0-cs0  Dspi0-cs1 spi0-tx  Bspi0-rx  Cspi1spi1-clk   Espi1-cs0   Hspi1-rx  Gspi1-tx  Fspi2spi2-clk   Ispi2-cs0   Lspi2-rx   Kspi2-tx   Jspi3spi3-clk  rspi3-cs0  uspi3-rx  tspi3-tx  sspi4spi4-clk  Mspi4-cs0  Pspi4-rx  Ospi4-tx  Nspi5spi5-clk  Qspi5-cs0  Tspi5-rx  Sspi5-tx  Rtestclktest-clkout0 test-clkout1 test-clkout2 tsadcotp-gpio  Yotp-out  Zuart0uart0-xfer  <uart0-cts  =uart0-rts uart1uart1-xfer    >uart2auart2a-xfer  uart2buart2b-xfer uart2cuart2c-xfer  ?uart3uart3-xfer  @uart3-cts uart3-rts uart4uart4-xfer  vuarthdcpuarthdcp-xfer pwm0pwm0-pin  pwm0-pin-pull-down vop0-pwm-pin vop1-pwm-pin pwm1pwm1-pin  pwm1-pin-pull-down pwm2pwm2-pin  pwm2-pin-pull-down pwm3apwm3a-pin  pwm3bpwm3b-pin hdmihdmi-i2c-xfer hdmi-cec pciepci-clkreqn-cpm  pci-clkreqnb-cpm buttonspwr-btn  pmicpmic-int-l  ypmic-dvs2  zvsel1-gpio vsel2-gpio sdsdmmc0-pwr-h  usb2vcc5v0-host-en  sdio-pwrseqwifi-enable-h  lcd-panellcd-panel-reset  opp-table0operating-points-v2  opp00 %Q , 5 :@opp01 %#F , 5opp02 %0, , Popp03 %< ,Hopp04 %G ,B@opp05 %Tfr ,*opp-table1operating-points-v2  opp00 %Q , 5 :@opp01 %#F , 5opp02 %0, , opp03 %< , Yopp04 %G ,~opp05 %Tfr ,opp06 %_" ,opp07 %kI ,Oopp-table2operating-points-v2 opp00 %  , 5opp01 %@ , 5opp02 %ׄ , opp03 %e , Yopp04 %#F ,Hopp05 %/ ,backlightpwm-backlight K  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ ] va {x 7okay external-gmac-clock fixed-clock=sY@ Mclkin_gmac` dc-12vregulator-fixedldc_12v{ gpio-keys gpio-keys power d A6 GPIO Power t Qdefault_vcc1v8-s3regulator-fixed lvcc1v8_s3{w@w@P 3vcc3v0-sdregulator-fixed  6Qdefault_{-- lvcc3v0_sdP| $vcc3v3-sysregulator-fixed lvcc3v3_sys{2Z2ZP{ |vcc-sysregulator-fixedlvcc_sys{LK@LK@P {vcc5v0-host-regulatorregulator-fixed  5Qdefault_ lvcc5v0_host{P{ vdd-logpwm-regulator valvdd_log{ 5\P{adc-keys adc-keys  buttons w@ dbutton-up Volume Up s button-down Volume Down r back Back  menu Menu   edp-panellg,lp079qx1-sp0vsimple-panel 9 {5Qdefault_ Cportendpoint rt5651-soundsimple-audio-card [realtek,rt5651-codec (i2s A- PMicrophoneMic JackHeadphoneHeadphone JackH jMic JackMICBIAS1IN1PMic JackHeadphone JackHPOLHeadphone JackHPORsimple-audio-card,cpu rsimple-audio-card,codec rsdio-pwrseqmmc-pwrseq-simple ext_clockQdefault_ 6   compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-methodclocks#cooling-cellsdynamic-power-coefficientoperating-points-v2cpu-supplyphandleportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqdisable-wpkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratesbroken-cdcap-mmc-highspeedvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nshp-det-gpiospk-con-gpioreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cells#iommu-cells#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdmasdma-namesrockchip,playback-channelsrockchip,capture-channelsiommusrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplyrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsbrightness-levelsdefault-brightness-levelpwmsenable-gpiosautorepeatdebounce-intervallabellinux,codelinux,input-typeenable-active-highio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervalpress-threshold-microvoltbacklightpower-supplysimple-audio-card,widgetssimple-audio-card,routingreset-gpios